IEEE Pervasive Computing April-June 2015 Page 11

IEEE Pervasive Computing April-June 2015 Page 11 Published by the IEEE CS .. 1536- 1268/ 15/$ 31.00 © 2015 IEEE PERVASIVE computing 9 Section Title Here Editor: Editor Name Here .. Editor affiliation here .. editor email here Smartphones Editor: Nayeem Islam .. Qualcomm .. nayeem. islam@ gmail. com M obile devices run at the limits of what is possible in computer system designs, with performance and battery life both paramount. Unfortunately, battery technology is advancing slowly. Making mobile devices truly better from generation to generation will necessitate new, creative ways to extract more from each joule of a battery’s capacity. Approximate computing is an emerging research area that promises to offer drastic energy savings. It exploits the fact that many applications don’t require perfect correctness. Many important mobile applications use “ soft” error- tolerant computations, including computer vision, sensor data analysis, machine learning, augmented reality, signal processing, and search. A few small errors while detecting faces or displaying game graphics, for example, might be acceptable or even unnoticeable, yet today’s systems faithfully compute precise outputs even when the inputs are imprecise. Approximate computing research builds software and hardware that are allowed to make mistakes when applications are willing to tolerate them. Approximate systems can reclaim energy that’s currently lost to the “ correctness tax” imposed by traditional safety margins designed to prevent worst- case scenarios. In particular, research at the University of Washington is exploring programming language extensions, a compiler, and a hardware co- processor to support approximate acceleration. APPROXIMATE COMPUTING CHALLENGES There are two key challenges to realizing approximate computing’s full potential: we need ways to safely program approximate computers, and we need hardware technologies that can smoothly trade off energy for accuracy. Regarding programmability, an approximate system must make it tractable for programmers to write correct software even when the hardware can be incorrect. Programmers need to isolate parts of the program that must be precise from those that can be approximated so that a program functions correctly even as quality degrades. For example, an image renderer can tolerate errors in the pixel data it outputs; a small number of erroneous pixels might be acceptable or even undetectable. However, an error in a jump table could lead to a crash, and even small errors in the image file format might make the output unreadable. Regarding the technology, approximate hardware must offer appealing quality- performance tradeoffs that can be exposed to the compiler. For example, an approximate adder implemented using power gating can rely on ISA ( instruction set architecture, or hardware/ software interface) extensions to specify the amount of error allowed in an addition operation. The challenge with most approximate hardware techniques is that they require modifications to existing processor designs, making their near- term adoption difficult, and they often present little energy reduction over their precise counterparts. To address these challenges, our end- to- end system includes two building blocks. First, a new programmerguided compiler framework transforms programs to use approximation in a controlled way. An Approximate C Compiler for Energy and Performance Tradeoffs ( Accept) uses programmer annotations, static analysis, and dynamic profiling to find parts of a program that are amenable to approximation. Second, the compiler targets a system on a chip ( SoC) augmented with a coprocessor that can efficiently evaluate coarse regions of approximate code. A Systolic Neural Network Accelerator in Programmable logic ( Snnap) is a hardware accelerator prototype that can efficiently evaluate approximate regions of code in a general- purpose program. 1 The prototype is implemented on the FPGA fabric of an off- the- shelf ARM SoC, which makes its near- term adoption possible. Hardware acceleration with Snnap is enabled by neural acceleration , an algorithmic transformation that substitutes regions of code in a program with approximate versions that can be efficiently evaluated on a specialized accelerator. Using Accept and Snnap, a software programmer can leverage the benefits of approximate acceleration with minimal effort by Approximate Computing: Making Mobile Systems More Efficient Thierry Moreau, Adrian Sampson, and Luis Ceze, University of Washington _______________